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| T H A T Corporation IC Voltage-Controlled Amplifiers THAT 2151, 2150A, 2155 FEATURES * * * * * * * * Wide Dynamic Range: >116 dB Wide Gain Range: >130 dB Exponential (dB) Gain Control Low Distortion: (0.008% @ 0 dB gain, 0.035% @15dB gain) Wide Gain-Bandwidth: 6 MHz Low Cost: $2.20 in '000s (2155) Single In-Line Package Dual Gain-Control Ports (pos/neg) * * * * * * * * APPLICATIONS Faders Panners Compressors Expanders Equalizers Filters Oscillators Automation Systems Description The THAT 2150 Series integrated-circuit voltagecontrolled amplifiers (VCAs) are high-performance current-in/current-out devices with two opposingpolarity, voltage-sensitive control ports. Based on dbx technology, they offer wide-range exponential control of gain and attenuation with low signal distortion. The parts are housed in a space-efficient, plastic 8-pin single-in-line (SIP) package, and require minimal support circuitry. Fabricated in a super low-noise process utilizing high hFE, complementary NPN/PNP pairs, the 2150 Series VCAs combine high gain-bandwidth product with low noise, low distortion, and low offset to offer discrete performance at IC prices. They are available in three grades, selected for distortion, allowing the user to optimize cost vs. performance. PIN 1 7 MODEL NO. THAT H J N BIAS CURRENT COMPENSATION 2 B D C E TYP. G F M L K I A 3 ITEM A B C D E F G H I J K MILLIMETERS 20.32 MAX. 1.1 MIN. 0.5 0.25 2.54 1.27 MAX. 0.51 MIN. 5.08 MAX. 2.8 + _ .2 _ + .1 INCHES 0.8 MAX. 0.043 MIN. 0.02 0.01 0.1 0.05 MAX. 0.02 MIN. 0.2 MAX. 0.11 + _ .008 _ + .004 Vbe MULTIPLIER 1 8 4 6 5.75 MAX. 1.5 MAX. 0.25 3.2 +.10 + _ .5 _ .04 0.227 MAX. 0.058 MAX. 0.01 +.004 0.126 _.002 + _ .02 5 L M N 1.1 MIN. 0.043 MIN. Figure 1. 2150 Series Equivalent Circuit Diagram Figure 2. 2150 Series Physical Outline dbx is a registered trademark of Carillon Electronics Corporation THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com Page 2 2150 Series IC VCAs SPECIFICATIONS 1 Absolute-Maximum Ratings (T A = 25C) Positive Supply Voltage (VCC) Negative Supply Voltage (VEE) Supply Current (ICC) +18 V -18 V 10 mA Power Dissipation (PD) (TA = 75C) Operating Temperature Range (TOP) Storage Temperature Range (TST) 330 mW -20 to +75C -40 to +125C Recommended Operating Conditions Parameter Positive Supply Voltage Negative Supply Voltage Bias Current Signal Current Symbol VCC VEE ISET IIN+IOUT Conditions Min +5 -5 2151 Typ Max +12 -12 2.4 175 +15 -15 4 750 Min +5 -5 -- -- 2150A Typ Max +12 -12 2.4 175 +15 -15 4 750 Min +5 -5 -- -- 2155 Typ Max +12 -12 2.4 125 +15 -15 4 550 Units V V mA Arms VCC-VEE= 24 V ISET= 2.4 mA -- -- Electrical Characteristics 2 Parameter Supply Current Equiv. Input Bias Current Input Offset Voltage Output Offset Voltage Symbol ICC IB VOFF(IN) VOFF(OUT) Conditions No Signal No Signal No Signal Rout=20 k 0 dB gain +15 dB gain +40 dB gain Min -- -- -- 2151 Typ Max 2.4 5 +10 4 8 -- Min -- -- -- 2150A Typ Max 2.4 5 +10 4 8 -- Min -- -- -- 2155 Typ Max 2.4 5 +10 4 8 -- Units mA nA mV -- -- -- -- 1 2 5 20 3 3 15 -- -- -- -- -- 1 2 7 20 3 3 15 -- -- -- -- -- 1 2 10 20 3 3 15 -- mV mV mV A Gain Cell Idling Current Gain-Control Constant IIDLE TA=25C (TCHIP35C) -60 dB < gain < +40 dB EC+/Gain (dB) EC-/Gain (dB) Pins 2 & 4 (Fig. 14) Pin 3 Ref TCHIP= 27C -60 to +40 dB gain EC+=-360mV, EC-=+360mV en(OUT) 20 Hz-20 kHz Rout= 20k 0 dB gain +15 dB gain 6.0 -6.0 -- -- 110 6.1 -6.1 +0.33 0.5 115 6.2 -6.2 -- 2 -- 6.0 -6.0 -- -- 110 6.1 -6.1 +0.33 0.5 115 6.2 -6.2 -- 2 6.0 -6.0 -- -- 110 6.1 -6.1 +0.33 0.5 115 6.2 -6.2 -- 2 -- mV/dB mV/dB %/C % dB Gain-control TempCo Gain-Control Linearity Off Isolation (Fig. 14) Output Noise EC / TCHIP -- -- -98 -88 -97 -86 -- -- -98 -88 -96 -86 -- -- -98 -88 -96 -86 dBV dBV 1. All specifications subject to change without notice. 2. Unless otherwise noted, TA=25C, VCC = +15V, VEE= -15V. Test circuit is as shown in Figure 3. SYMADJ is adjusted for minimum THD @ Vin=1 V, 1 kHz, 0 dB gain. THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com Rev. 10/25/96 Page 3 Electrical Characteristics (Cont'd.) Parameter Total Harmonic Distortion Symbol THD Conditions IIN+ IOUT = 180 A, 1 kHz 0 dB gain 15 dB gain IIN+ IOUT = 150 A, 1 kHz 0 dB gain 15 dB gain Min 2151 Typ Max Min 2150A Typ Max Min 2155 Typ Max Units -- -- 0.004 0.02 0.025 0.045 -- -- 0.005 0.03 0.05 0.07 -- -- -- -- -- -- % % -- -- -1.6 -0.1 -- -- 0 0.0 -- -- +1.6 +0.1 -- -- -2 -0.15 -- -- 0 0.0 -- -- +2 +0.15 -- -- -2.5 -0.2 0.006 0.03 0.05 0 0.0 0.07 +2.5 +0.2 % % mV dB Symmetry Control Voltage Gain at 0 V Control Voltage VSYM AV= 0 dB, THD < 0.07% EC- = 0 mV +15V Ec7 V+ 47p 2150 Series VCA OUT Ec+ 20k - 3 Ec- INPUT 10u 20k 1 -IN Ec+ GND V- 4 8 5 6 2 LF351 + OUTPUT +15V 5.1k 51 Rsym 150k 300k (2155) 390k (2150A) 470k (2151) 50k SYM ADJ -15V -15V Figure 3. Typical Application Circuit Figure 4. Frequency Response Vs. Gain (2150A) Figure 5. Noise (20kHz NBW) Vs. Gain (2150A) THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com Page 4 2150 Series IC VCAs Theory of Operation The THAT 2150 Series VCAs are designed for high performance in audio-frequency applications requiring exponential gain control, low distortion, wide dynamic range and low dc bias modulation. These parts control gain by converting an input current signal to a bipolar logged voltage, adding a dc control voltage, and re-converting the summed voltage back to a current through a bipolar antilog circuit. Figure 6 presents a considerably simplified internal circuit diagram of the IC. The ac input signal current flows in pin 1, the input pin. The internal op amp works to maintain pin 1 at a virtual ground potential by driving the emitters of Q1 and (through the Voltage Bias Generator) Q3. For positive input currents (Iin defined as flowing into pin 1), the op amp drives the emitter of Q1 negative, turning off its collector current, while simultaneously driving the emitter of Q3 negakT ; IC3 is the collector curq rent of Q3; and IS is the reverse-saturation current of Q3. It is assumed that D3 matches Q3 (and will be assumed that they match Q4 and D4, as well). VT is the thermal voltage, In typical applications (see Figure 3, Page 3), pin 4 is connected to a voltage source at ground or nearly ground potential. Pin 8 is connected to a virtual ground (usually the inverting input of an op amp with negative feedback around it). With pin 4 near ground, and pin 8 at virtual ground, the voltage at the cathodes of D3 and D4 will cause an exponentially-related current to flow in D4 and Q4, and out via pin 8. A similar equation governs this behavior: IC4 V3 = EC+ - 2VT ln . IS Exponential Gain Control - The similarity between the two preceeding equations begs further exploration. Accordingly: D1 D2 Q2 Voltage Bias + IC4 IC3 V3 = EC+ - 2VT ln = EC- - 2VT ln IS IS 3 Ec+ IN 1 2 Q1 Ec8 OUT Q4 4 IC4 IC3 EC+ - EC- = 2VT ln - 2VT ln IS IS IC4 = 2VT ln . IC3 Rearranging terms, IC4 = IC3 e EC+-EC- 2VT Q3 Generator Iin D3 Ec+ (SYM) D4 V3 V5 . Figure 6. Simplified Internal Circuit Diagram tive, turning it on. The input signal current, therefore, is forced to flow through Q3 and D3. Logging & Antilogging Because the voltage across a base-emitter junction is logarithmic with collector current, the voltage from the base of Q3 to the cathode of D3 is proportional to the log of the positive input current. The voltage at the cathodes of D3 and D4 is therefore proportional to the log of the positive input currents plus the voltage at pin 3, the negative control port. Mathematically, IC3 V3 = EC- - 2VT ln , IS where V3 is the voltage at the junction of D3 and D4; If pin 3 and pin 4 are at ground potential, the current in Q4/D4 will precisely mirror that in Q3/D3. When pin 3 is positive with respect to pin 4, the voltage across the base-emitter junction of Q3 is higher than that across the base-emitter junction of Q4, so the Q4/D4 current remains proportional to, but less than, the current in Q3/D3. In the same manner, a negative voltage at pin 3 with respect to pin 4 causes the Q4/D4 current to be proportional to, but greater than that in Q3/D3. The ratio of currents is exponential with the difference in the voltages EC+ and EC-, providing convenient "deci-linear" control. Mathematically, this is: AV = IC4 =e IC3 EC+-EC- 2VT , where AV is the current gain. For pin 4 at or very near ground, at room temperature (25C), allowing for a 10C internal temperature rise, and converting to a base of 10 for the exponential, this reduces to: THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com Rev. 10/25/96 Page 5 AV = 10 -EC- 0.122 Transistor Matching . The bias current flows downwards in the core (from Q1 to Q3, and from Q2 to Q4) so long as there is good matching between all four compound transistors (transistors plus diodes). Mismatches will cause a dc output current to flow in pin 8, which will ultimately manifest itself as a dc offset voltage. Static offsets are of little consequence in most audio applications, but any mismatch-caused dc output current will be modulated by gain commands, and may become audible as "thumps" if large, fast gain changes are commanded in the presence of significant mismatches. Transistor matching also affects distortion. If the top half of the gain cell is perfectly matched, while the bottom half is slightly off, then the gain commanded by the voltage at pin 3 will affect the two halves of the core differently. Since positive and negative halves of ac input signals are handled by separate parts of the core, this gives rise to even-order distortion products. When pin 3 is at O V, the current ratio is unity. When pin 3 is at +122 mV, the output current (Q4) is 10 times (20 dB) less than the input current. At -122 mV, the output current is 10 times (20 dB) greater than the input current. Another way of expressing this relationship is: Gain = -EC- , where Gain is the gain in decibels. 0.0061 Negative Input Currents For negative input currents, Q1/D1 operate with Q2/D2 to mirror the lower-half-core behavior. Pin 2 is normally at or very near ground (see the section below on Symmetry Adjustment for more detail), so the same gain scaling applied to the base of Q3 is applied to the base of Q2. The polarity (positive/negative, in dB) of the gain is the same for the top pair versus the bottom pair of the four "core" transistors because their sexes (NPN/PNP) are inverted in the top versus the bottom, while the bases are cross-connected between the input (left) half and the output (right) half of each pair. The resulting control over gain is extremely consistent from unit to unit, since it derives from the physics of semiconductors. Figure 7 shows actual data from a typical 2150 Series VCA, taken at 25C. Symmetry Adjustment The monolithic construction of the devices assures relatively good matching between the paired transistors, but even small VBE mismatches can cause unacceptable asymmetries in the output. For this reason, the bases of Q1 and Q4 are brought out separately to pin 2 and pin 4, respectively. This allows a small static voltage differential to be applied to the two bases. The applied voltage must be set to equal the sum of the VBE mismatches around the core (which varies from sample to sample). Figure 3 (Page 3) includes a typical circuit to apply this symmetry voltage. RSYM controls primarily even-order harmonic distortion, and is usually adjusted for minimum THD at the output. Figure 8 plots THD vs. the voltage between pins 2 and 4 (the two EC+ ports) for various gain settings of a typical part. Opposite Polarity Control As may be seen from the mathematics, the bases of Q1 and Q4 can also be used as an additional control Figure 7. Gain Versus Control Voltage (Pin 3) at 25C Core Bias Currents A quiescent bias current in the core transistors is established by the Voltage Bias Generator shown in Figure 6. This current acts like crossover bias in the output stage of a complementary class AB power amplifier, smoothing the transition between turning on the top (PNP) pair and the bottom (NPN) pair of transistors in the core. This lowers distortion greatly at some cost to noise performance, as the current noise of the core transistors (which run at approximately 20 A) is the dominant noise source in the 2150 Series VCAs. Figure 8. Typical THD Versus Symmetry Voltage THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com Page 6 2150 Series IC VCAs port, with an opposite sense of control from that at pin 3. To use this port, both pins must be driven with the control voltage, while a small differential voltage is accommodated between the two pins. (Figure 14, Page 9, shows the typical connection.) Either pin 3, or pins 2 and 4, or both ports together may be used for gain control. Mathematically, this relationship is as follows: EC+-EC- 0.122 vent such dc terms, ac input coupling is strongly recommended. A plot of typical output offset voltage versus gain for the circuit of Figure 3 is shown in Figure 9. (The LF351's offset was adjusted to 0 V for this plot.) AV = 10 , where AV is the gain in volts/volt, or Ec+ - Ec- , where Gain is the gain in decibels. Gain = 0.0061 Control Port Source Impedance The control ports (pins 2 through 4) are connected directly to the bases of the logging and/or antilogging transistors. As was implied in the earlier discussion on Logging and Antilogging (Page 4) the accuracy of the logging and antilogging is dependent on the EC+ and EC- voltages being exactly as desired to control gain. The base current in the transistors will follow the collector currents, of course. Since the collector currents are signal-related, the base currents will also be signalrelated. Should the source impedance of the control voltage(s) be large, the signal-related base currents will cause signal-related voltages to appear at the control ports, which will interfere with precise logging and antilogging, in turn causing distortion. The 2150 Series VCAs are designed to be operated with zero source impedance at pins 2 and 3, and a 50 source impedance at pin 4. (Pin 4 is intended for connection to the symmetry control, hence the higher design-center source impedance.) One can estimate the distortion caused by a specific, non-zero source impedance by determining the base voltage modulation due to signal current based on a core-transistor of approximately 300 (NPN) or 100 (PNP), and converting the resulting decibel gain modulation to a percentage. Even 100 can spoil the good performance of these parts at high signal levels. Figure 9. DC Offset Vs. Gain, After Symmetry Adjustment Current Programming The size of the current source at the bottom of the core (Figure 6, Page 4) is programmed externally via ISET, which is normally determined by a resistor from pin 5 to V-. The voltage at pin 5 is typically -2.7 V. ISET divides into two portions: approximately 400 A is used for internal biasing, and the rest is available for the current source at the bottom of the core. ISET should therefore be 400 A larger than the total of the peak input and output signal currents. Note that the output impedance of the internal opamp is approximately 2 k, and under peak demands, the sum of the input and output currents plus ISET must be supplied through this impedance, lowering the voltage available to drive the core. For more information, see the Power Supplies section on Page 8. Headroom Maximum signal currents are also limited by the logarithmic characteristics of the core transistors. In the 2150 Series, these devices are specially constructed to conform to an ideal log-linear curve over a wide range of currents, but they reach their limit at approximately 1 mA. The symptom of failing log conformance is increasing distortion with increasing current levels. The onset of distortion is gradual at low current levels, and then more rapid as current becomes high. Figures 10 through 12 show distortion versus signal level for the three parts in the 2150 Series for -15 dB, 0 dB, and +15 dB gain. The acceptable distortion will determine the maximum signal level for a particular design. DC Input Signals Any dc currents in the feedback loop of the internal op amp will show up as dc terms in the output signal, and will be modulated by gain commands. Input bias currents will cause a dc current to flow in the feedback loop provided by the input side of the core. For this reason, input bias currents in the internal op amp must be kept very low. The bias current compensation at the input stage provides excellent cancellation of the bias current required by the input differential amplifier. Of course, this good performance can be negated by a dc current supplied from outside the VCA. To pre- THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com Rev. 10/25/96 Page 7 Figure 10. 1kHz THD+Noise Vs. Input, -15 dB Gain Figure 11. 1kHz THD+Noise Vs. Level, 0 dB Gain Figure 12. 1kHz THD+Noise Vs. Input, +15 dB Gain Applications Input As mentioned above, input and output signals are currents, not voltages. While this often causes some conceptual difficulty for designers first exposed to this convention, the current input/output mode provides great flexibility in application. The input pin (pin 1) is a virtual ground with negative feedback provided internally (see Figure 6, Page 4). The input resistor (shown as 20 k in Figure 3, Page 3) should be scaled to convert the available ac input voltage to a current within the linear range of the device. (Peak input currents should be kept under 1 mA for best distortion performance.) An additional consideration is stability: the internal op amp is intended for operation with source impedances of less than 30 k at high frequencies. For most audio applications, this will present no problem. The choice of input resistor has an additional, subtle effect on distortion. Since the feedback impedances around the internal opamp (essentially Q1/D1 and Q3/D3) are fixed, low values for the input resistor will require more closed-loop gain from the opamp. Since Figure 13. THD Vs. Frequency, 0 dB Gain the open-loop gain naturally falls off at high frequencies, asking for too much gain will lead to increased high-frequency distortion. For best results, this resistor should be kept to 10 k or above. Distortion vs. frequency for a 1 V signal at 0 dB gain with a 20 k input resistor is plotted in Figure 13. The quiescent dc voltage level at the input is approximately +10 mV. As mentioned above, any dc input currents will cause dc signals in the output which will be modulated by gain, causing audible thump. There- THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com Page 8 2150 Series IC VCAs fore, capacitive coupling is almost mandatory for quality audio applications. Choose a capacitor which will give acceptable low frequency performance for the application. Multiple signals may be summed by multiple resistors, just as with an inverting op amp configuration. In such a case, a single coupling capacitor may be located next to pin 1 rather than multiple capacitors at the driven ends of the summing resistors. However, take care that the capacitor does not act as an antenna for stray signals. this source must supply the sum of the input and output signal currents, plus the bias to run the rest of the IC. The minimum value for this current is 430 A over the sum of the required signal currents. 2.4 mA is recommended for most pro audio applications where +15 V supplies are common and headroom is important. Higher bias levels are of limited value, partly because the resistor mentioned in the positive supply discussion must supply all the current devoted to the core, and partly because the core transistors become ineffective at logging and antilogging at currents over 1 mA. Since pin 5 is intended as a current supply, not a voltage supply, bypassing at pin 5 is not necessary. Pin 6 is used as a ground reference for the VCA. The non-inverting input of the internal op amp is connected here, as are various portions of the internal bias network. It may not be used as an additional input pin. Output The output pin (pin 8) is intended to be connected to a virtual ground node, so that current flowing in it may be converted to a voltage (see Figures 3, 14, & 15). Choose the external op amp for good audio performance. The feedback resistor should be chosen based on the desired current-to-voltage conversion constant. Since the input resistor determines the voltage-to-current conversion at the input, the familiar ratio of Rf/Ri for an inverting op amp will determine the overall voltage gain when the VCA IC is set for 0 dB current gain. Since the VCA performs best at settings near unity gain, use the input and feedback resistors to provide design-center gain or loss, if necessary. A small feedback capacitor around the output op amp is necessary to cancel the output capacitance of the VCA. Without it, this capacitance will destabilize most op amps. The capacitance at pin 8 is typically 30 pf. Voltage Control The primary voltage-control pin is pin 3. This point controls gain inversely with applied voltage: positive voltage causes loss, negative voltage causes gain. As described on Page 6, the current gain of the VCA is unity when pin 3 is at 0 V with respect to pins 2 and 4, and varies with voltage at approximately -6.1 mV/dB, at room temperature. As implied by the equation for AV (at the foot of Page 4), the gain is sensitive to temperature, in proportion to the amount of gain or loss commanded. The constant of proportionality is 0.33% of the decibel gain commanded, per degree Celsius, referenced to 27C (300K). This means that at 0 dB gain, there is no change in gain with temperature. However, at -122 mV, the gain will be +20 dB at room temperature, but will be 20.66 dB at a temperature 10C lower. The formula is: Gain = EC+-EC- , (0.0061) (1+0.0033) T Power Supplies The positive supply is connected directly to pin 7. No special bypassing is necessary, but it is good practice to include a small (~1 f) electrolytic close to the VCA IC on the PCB. Performance is not particularly dependent on supply voltage. The lowest permissible supply voltage is determined by the sum of the input and output currents plus ISET, which must be supplied through the resistor at the top of the core transistors (see Figure 1) while still allowing enough voltage swing to bias the internal op amp and the core transistors themselves. This resistor is approximately 2 k. Reducing signal currents may help accommodate low supply voltages. The highest permissible supply voltage is fixed by the process characteristics and internal power consumption. +15 V is the nominal limit. The negative supply terminal is intended to be connected to a resistive current source, which determines the current available for the core. As mentioned before, where EC is in volts, and T is the difference between the actual temperature and room temperature (25C). For most audio applications, this change with temperature is of little consequence. However, if necessary, it may be compensated by a resistor which varies its value by .33%/C. Such parts are available from RCD Components, Inc, 3301 Bedford St., Manchester, NH, USA [(603) 669-0054], and KOA/Speer Electronics, PO Box 547, Bradford, PA, 16701 USA [(814)362-5536]. When pin 3 is used for voltage control, pin 2 is connected to ground and pin 4 is used to apply a small THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com Rev. 10/25/96 Page 9 symmetry voltage (<2.5 mV) to correct for VBE mismatches within the VCA IC. For this purpose, the 2150 series devices were designed for optimum performance with an impedance of approximately 50 at pin 4. A trim pot is used to adjust the voltage between pin 4 and pin 2 as shown in Figure 3, Page 3. For supply voltages other than shown, scale RSYM to provide the required adjustment range. It is also possible to use pin 2 and pin 4 together as an opposite-sense voltage control port. A typical circuit using this approach is shown in Figure 14. Pin 3 may be grounded, and pin 2 driven against the symmetryadjustment voltage. The change in voltage at pin 4 does have a small effect on the symmetry voltage, but this is of little practical consequence in most applications. Using the opposite sense of control can sometimes save an inverter in the control path. It is also possible (and advantageous) to combine both control ports with differential drive (see Figure 15). While the driving circuitry is more complex, this configuration offers better performance at high attentuation levels (<-90 dB) where the single-controlport circuits begin to saturate Q1 (for EC- drive) or Q3 (for EC+ drive). When either of these transistors saturates, the internal opamp will accomodate the change in current demand by responding with a small change in its input offset voltage. This leads to an accumulation of charge on the input capacitor, which in turn can cause thump when the high attenuation is suddenly removed (e.g., when a muted channel is opened). Differential control drive avoids the large dc levels oth- erwise required to command high attenuation (+610 mV for -100 dB gain at pin 3 alone, vs. 305 mV when using both pin 3 and pins 2 and 4). Control Port Drive Impedance It has already been noted that the control port should be driven by a low source impedance for minimum distortion. This often suggests driving the control port directly with an opamp (see below under Noise Considerations). However, the closed-loop output impedance of an opamp typically rises at high frequencies due to falling loop gain. The output impedance is therefore inductive at high frequencies. Excessive inductance in the control port source impedance can cause the VCA to oscillate internally. In such cases, a 51 resistor in series with a 1.5 nf capacitor from the control port to ground will usually suffice to prevent the instability. Noise Considerations It is second nature among good audio designers to consider the effects of noisy devices on the signal path. As is well known, this includes not only active devices such as op amps and transistors, but extends to the choice of impedance levels as well. High value resistors have inherent thermal noise associated with them, and the noise performance of an otherwise quiet circuit can be easily spoiled by the wrong choice of impedance levels. Less well known, however, is the effect of noisy circuitry and high impedance levels in the control path of +15V 47p 2150 2150 Series Series VCA VCA INPUT 10u 20k 1 7 V+ 20k 3 EcOUT Ec+ Ec+ GND -IN 8 - 4 + V- 2 LF351 OUTPUT +15V 5 6 51 5.1k Rsym 50k SYM ADJ -15V Ec+ 300k (2155) 390k (2150A) 470k (2151) 240k -15V Figure 14. Positive Control Port Using Pins 2 and 4 THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com Page 10 2150 Series IC VCAs voltage-control circuitry. The 2150 Series VCAs act like double-balanced multipliers: when no signal is present at the signal input, noise at the control input is rejected. So, when measuring noise (in the absence of signal -- as most everyone does), even very noisy control circuitry often goes unnoticed. However, noise at the control port of these parts will cause noise modulation of the signal. This can become significant if care is not taken to drive the control ports with quiet signals. The 2150 Series VCAs have a small amount of inherent noise modulation because of its class AB biasing scheme, where the shot noise in the core transistors reaches a minimum with no signal, and increases with the square root of the instantaneous signal current. However, in an optimum circuit, the noise floor rises only to -94 dBV with a 50 A signal at unity gain -- 4 dB of noise modulation. By contrast, if a unity-gain connected, inverting 5534 opamp is used to directly drive the control port, the noise floor will rise to 92 dBV -- 6 dB of noise modulation. To avoid excessive noise, one must take care to use quiet electronics throughout the control-voltage circuitry. One useful technique is to process control voltages at a multiple of the eventual control constant (e.g., 61 mV/dB -- ten times higher than the VCA requires), and then attenuate the control signal just before the final drive amplifier. With careful attention to impedance levels, relatively noisy op amps may be used for all but the final stage. Closing Thoughts The design and application of Voltage-Controlled Amplifiers has traditionally been partly black art, involving as much magic as science. We hope that the foregoing discussion will help to de-mystify the subject. THAT Corporation welcomes comments, questions and suggestions regarding these devices, their design and application. Please feel free to contact us with your thoughts. +15V 2150 2150 Series Series VCA VCA 3 Ec-IN Ec+ GND Ec+ OUT 47p 20k - 7 V+ INPUT 10u 20k 1 8 4 + V- 2 LF351 OUTPUT +15V 5 + 6 51 5.1k Rsym 50k 150k 240k 300k (2155) 390k (2150A) 470k (2151) SYM ADJ - 1k 1k -15V Ec+ -15V Figure 15. Using Both Control Ports (Differential Drive) THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com |
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